CMOS Tech: NMOS and PMOS Transistors in CMOS Inverter (3-D View)

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Published 2020-05-08
CMOS technology uses both NMOS and PMOS transistors fabricated on the same silicon chip. The PMOS transistor is connected between the power supply and the output, and the NMOS transistor is connected between the output and ground. The NMOS and PMOS transistor gates are connected, forming the input of the inverter.

In the CMOS inverter and other CMOS logic functions, the output is connected through one or more transistors to either the power supply or ground. There is never a path from the power supply to ground (a short-circuit path). Furthermore, there is no current flow in the steady state, as the logic gate inputs are implemented as transistor gates, which are insulated from the source and drain terminals of the transistor.

Current flows only during switching from one state to another. Therefore, energy consumption depends on how often switching occurs and whether the logic switches in on each clock edge. Current flows only to charge or discharge parasitic capacitance in the circuit.

The logic gate output must always be pulled high to the supply voltage or pulled low to ground, and never allowed to float. A floating output results in an unknown intermediate voltage a the inputs of the gates downstream. This can cause both the PMOS and NMOS of transistors to be partially turned on, providing a short-circuit path from power to ground. To prevent this, the gate output must be connected through one or more transistors to either the power supply or ground.

Transistors are built using N-type and P-type silicon. In N-type silicon, a small fraction of the silicon atoms are replaced by an impurity such as phosphorus that has one more electron in its outer shell than silicon. A phosphorus atom easily gives up its extra electron, creating a negatively charged mobile carrier (electron) and an immobile ionized atom (phosphorus). N-type silicon can conduct electricity by means of its mobile electrons.

In P-type silicon, a small fraction of the silicon atoms are replaced by an impurity such as boron that has one fewer electron in its outer shell than silicon. A boron atom easily accepts an extra electron from a neighboring silicon atom, resulting in an immobile ionized atom (boron) and a positively charged silicon atom with an electron shortage. The missing electron is called a hole. A hole works just like a positively charged mobile particle because an electron from a neighboring silicon atom can jump into the hole, creating a new hole. P-type silicon can conduct electricity by means of its mobile holes.

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For more information, see the free textbook "Modern Semiconductor Devices for Integrated Circuits" by Chenming Hu: www.chu.berkeley.edu/modern-semiconductor-devices-…

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All Comments (21)
  • @simonfelix9138
    The 3D layout was really helpful for visualising how the CMOS inverter might actually look in real life. Great work.
  • @uddhabchoudhury
    This is the clearest video on CMOS Tech on YouTube! No wonder it has zero dislikes. Thank you sir! For clearing my concepts in 7 minutes what I couldn't do in 7 months XD
  • Thank you very much for these visuals. Until now I was just mugging up things for CMOS but now i clearly understand what is actually happening inside. Great work!
  • i have almost seen 10 to 11 videos in youtube about the 3d modelling of CMOS, but this video cleared all the doubts..thank u sir...😊😊
  • Excellent work and explanation. These devices should always be explained with 3D drawings.
  • @agoohoo
    This tutorial is very easy to understand. Really helpful, thanks for sharing!
  • @amanagarwal4007
    Thank you for the wonderful explanation .Great animated visuals👍
  • @ccango
    Awesome, great explanation. Thank you so much!!
  • Governments spend millions on universities, just for a guy on youtube to beat the shit out of them .. Great video, ty!
  • @timgraf7933
    Ok thank you, i never understood why the PMOS gets conductive when you apply 0V at its gate, allways thought you need a negative voltage, but thanks to your video, you only need a negative potential difference between source and gate. (source is connected to bulk).
  • @wisdomkhan
    Amazing amazing animation and explanation. Thanks a lot.
  • Many thanks for detailed explanation. Only after your video it was clear how Input and Output for logic gates works. Even after several times reading Harris and Harris book, it was really challenging to understand the current flow.
  • @leonhorvat
    What a beautiful and genial explanation! 1000x thx :)
  • @Skall-ex
    Extremely good video. Finally understood some things about this confusing goddamn subject, lol.