Example Interview Questions for a job in FPGA, VHDL, Verilog

Thanks Doug Demuro of Embedded Systems

"Pretend like you're interviewing with me for your job, pause the video, give your answer to me. I'm not going to hear it obviously, we're not there yet with the internet but.. maybe some day". Haha, looks like we're at that day

80% of the questions we covered in the last month and a half (sophomore year) in EE! Thanks for giving us the insight on what to look for and to keep on the tip of the tongue

Best channel about learning in depth FPGA's Ive seen this far, thanks for all your con tent!

These videos (and also your site) are extremely helpful. Just had several RTL design interviews the past week and they asked similar questions, so thanks so much man!

Using this to study for an RTL design internship interview in 2 days. Ever since I started watching your videos 5 months ago, I've fallen in love with FPGA design. Thanks for all you have done for me!

I knew most of the answers to these, but I always flop on interviews because I get tripped up on terminology. This video has been extremely helpful in giving concise answers for an interview format. Thank you!

Thank you for your job! people like you inspire me to self-development

Wow, a lot of useful material here. I'm not planning on interviewing for any digital logic design jobs in the near future. For me, this information serves as a list of interesting topics to study in order to begin learning about this field.

I have been writing Verilog Code since at least 1994. I finished my MSEE in 1990. I have now been coding Verilog and Matlab for almost 30 years. Its very good that you made this Video. Good questions too. I wish you add more content - one common area would be 1. Clock domain crossings - in Verilog. 2. FIFO design with Grey coded counters in Verilog - Cliff Cummings - 1994 3. AXI-4 streaming Interface - which requires 4 signals. 4. AXI-4 Slave design.

I was always taught that the difference between Moore and Mealy was not about what state to go to next but more about the outputs at each state. In Mealy, the outputs are dependent on the current state and the inputs, but in Moore the outputs are only dependent on the current state only.

This is actually pretty good. Thanks. Great videos.

GREAT VIDEO that summarizes very important info

I graduated recently and decided I wanted to work with fpgas after some experience with them during an internship, just after applying for a graduate role I watched this video and used your site to prepare for the interview and I'm happy to say it paid off and I got the job! Thank you very much for helping me achieve my goal of becoming an fpga engineer

Thank you a great introduction to FPGA I have a lot of discrete logic family experience mostly the 74 ABC families and some 4000 series (I got as far as treating them as analogue parts). I was surprised that I actually new the answers plus more detailed knowledge about how the digital blocks worked and what they are used for.

Awesome video. Great reminder of my college VHDL courses.

I know about zero of these questions today, but it's great to have a good study guide. :)

It was really useful to hear it in English. Thanks!

Excellent and very useful discussion - I am impressed

This is really nice. Good questions and I learned new things today. But At 7:50. Are you sure DRAM is faster than SRAM ? 1. SRAM uses multiple CMOS transistors to store a bit(typically 6-8 CMOS FET's) while DRAM is made up uses single transistor plus a capacitor. So memory cell of SRAM occupies more area than memory cell of DRAM. DRAM is thus more dense and can fit more memory bits in same areas as SRAM cell. 2. However, DRAM needs to periodically refresh (hence dynamic and not continuous power supply) the charge on the capacitors of its memory cell which tends to leak with time while SRAM cells remember their logic due to cross-coupling(feedback) and continuous power supply from VDD/VSS power rails (which makes it power hungry). 3. Data can be read from SRAM at lower latency (order or more) and higher bandwidth (several orders) compared to DRAM. So SRAMs are faster than DRAM. 4. SRAM is used for very small (KB to few MB) fast on-chip L1/L2/L3 instruction and data caches on cpu's/gpus or or scratch pad memory in embedded socs while DRAM (GBs to TB) is used off chip to store high amounts of data. 5. SRAM per bit is more expensive in terms of area, power, and money compared to DRAM so SRAM is only used in small sizes (on chip or off chip) and to store data whose access time is critical to speed.DRAM us used when higher capacity is needed but speed of access is not important.